Download e-book for iPad: Designing High-Performance Amplifiers, Volume 3 - Analog by Feucht, D.

By Feucht, D.

ISBN-10: 1613444192

ISBN-13: 9781613444191

ISBN-10: 1891121847

ISBN-13: 9781891121845

This quantity, for engineers and scholars, applies the recommendations from the 1st volumes and comprises a sophisticated therapy of amplifier design/analysis emphasizing either wideband and precision amplification. issues contain bandwidth extension, noise and distortion, results of parts, instrumentation and isolation amplifiers, autocalibration, thermal results, current-feedback amplifiers, multi-path schemes, feed ahead, fT multipliers, buffers, voltage translators, Giulbert achieve cells and multipliers.

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Additional info for Designing High-Performance Amplifiers, Volume 3 - Analog Circuit Design Series

Example text

L1 > L2 is necessary to meet these conditions with a capacitive load. The basic theory of T-coils, including the full derivation of the above equations (and others), was originally worked out at Tektronix by Robert I. Ross and Carl Battjes (1982), inventor of T-coil compensation. Subsequently, Peter Staricˇ and Erik Margan presented the derivation in Wideband Amplifiers (2006). Even greater bandwidth improvement is possible by taking advantage of the constant-resistance input of the T-coil circuit.

This two-stage cascaded amplifier is typical in high-speed circuit design as a place to start before increasing amplifier “speed” (bandwidth). What mainly can limit speed is the capacitance, Co, at the collector node of the first stage. It forms a time constant with RL that slows the dynamic response. To increase speed, it is possible to introduce various inductive peaking techniques. However, for IC and some discrete design, inductors are problematic. A speed-up technique that uses capacitance instead is the bootstrap speed-up circuit, shown below, where Q 1 has been replaced by a current source, i, and the Q 2 stage by an ideal ×1 buffer amplifier.

The pole formed by R2 and C is cancelled by the ×1 buffer gain. If its gain were a value of K other than one, a finite pole factor would appear at s ·(K − 1) · R2 · C + 1. Now, include Co in the analysis such that Co ≠ 0. Then the circuit can be modeled as shown below. The input current source is omitted but attaches to the output node, at v1. The two-loop circuit reduces to a single loop by Thevenizing vo, C, and R2, as shown in the second circuit. Then superposition of the two sources, vo and i, results in the following two equations:  sR 2C + 1  sR 2C   v1 = v o ⋅   ⋅ 2 , i = 0  sR 2C + 1   s ( R1R 2CCo ) + s [( R1 + R 2 ) ⋅Co + R 2C ] + 1   1 v1 = i ⋅  ( R1 + R 2 1 sC )   sCo  s ( R 1 R 2 )C + 1 , vo = 0 = i ⋅ ( R1 + R 2 ) ⋅ 2 s R1R 2CCo + s [( R1 + R 2 )Co + R 2C ] + 1 C R1 V1 + Vo R2 − R2 sR2C + 1 Co R1 V1 + sR2C  vo .

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Designing High-Performance Amplifiers, Volume 3 - Analog Circuit Design Series by Feucht, D.


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