By Randal E. Bryant, James H. Kukula (auth.), Andreas Kuehlmann (eds.)
In 2002, the foreign convention on machine Aided layout (ICCAD) celebrates its twentieth anniversary. This ebook commemorates contributions made by means of ICCAD to the extensive box of layout automation in the course of that point. the root of ICCAD in 1982 coincided with the expansion of enormous Scale Integration. The sharply elevated performance of board-level circuits ended in an incredible call for for extra robust digital layout Automation (EDA) instruments. whilst, LSI grew speedy and complicated circuit integration turned extensively avail capable. This, in flip, required new instruments, utilizing subtle modeling, research and optimization algorithms so as to deal with the evermore complicated layout procedures. no longer unusually, through the related interval, a couple of start-up com panies started to commercialize EDA suggestions, complementing numerous current in-house efforts. the general elevated curiosity in layout Automation (DA) re quired a brand new discussion board for the rising group of EDA execs; one that will be interested by the book of top quality study effects and supply a constitution for the alternate of principles on a large scale. a few of the unique ICCAD volunteers have been additionally participants of CANDE (Computer-Aided community Design), a workshop of the IEEE Circuits and Sys tem Society. actually, it used to be at a CANDE workshop that invoice McCalla prompt the construction of a convention for the EDA expert. (Bill later built the name).
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Extra info for The Best of ICCAD: 20 Years of Excellence in Computer-Aided Design
Donath and H.. Ofek, "Automatic Identification of Equivalence Points for Boolean Logic Verification", IBM Tech. Discolsure Bulletin, vol. R. Ford,Jr. R. Fulkerson,Flows in Networks,Princeton, NJ: Princeton University Press, 1962.  M. Fujita,H. Fujiwara and N. Kawato,"Evaluation and Improvements of Boolean Comparison Method based on Binary Decision Diagrams",Proceedings of [CCAD, Nov 1988.  Sharad Malik, Albert R. Wang, Robert K. Brayton and Alberto Sangiovanni-Vincentelli, "Logic Verification using Binary Decision Diagrams in a Logic Synthesis Environment", Proceedings of [CCAD, Nov 1988.
The paper is organized as follows. 1, we introduce some required terminology. 4 the different parts of the algorithm are described. In Section 3, we illustrate the algorithm with an example and report our experimental results. Section 4 contains an approach to the problem of false negatives, and Section 5 is a summary. 2. Description of the Algorithm In this section, we present a method which reduces the question of the equivalence of two circuits to a number of questions about the equivalence of smaller circuits.
2. The Formal Verifier PRIAM PRIAM is a formal verifier of functional correctness of digital circuits. This tool has been integrated in the CAD system used by the circuit designers at Bull. Table 1 gives some verification times for industrial circuits. Note that none of these circuits could have been verified by simulation because of their very large numbers of inputs. Within BDLL's design methodology, the behaviour of synchronous circuits is described with the hardware description language LDS.
The Best of ICCAD: 20 Years of Excellence in Computer-Aided Design by Randal E. Bryant, James H. Kukula (auth.), Andreas Kuehlmann (eds.)