By Te Chiang Hu, Ernest S. Kuh
E-book by way of Hu, Te Chiang
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Additional info for VLSI Circuit Layout: Theory and Design
If there is no loss in the interconnect between the transmitter and receiver, the full voltage levels will arrive at the receiver and be interpreted as the correct logic states (HIGH or LOW). The worst-case scenario for digital signaling is when the transmitter outputs its levels at VOH-min and VOL-max. These levels represent the furthest away from an ideal voltage level that the transmitter can send to the receiver and are susceptible to loss and noise that may occur in the interconnect system.
This model uses a voltage threshold (Vth) to represent the switching point between the binary codes. If the voltage of the signal (Vsig) is above this threshold, it is considered a logic HIGH. If the voltage is below this threshold, it is considered a logic LOW. A graphical depiction of this is shown in Fig. 15. The terms HIGH and LOW are used to describe which logic level corresponds to the higher or lower voltage. 2 Digital Circuit Operation • 45 Fig. 15 Deﬁnition of logic HIGH and LOW It is straightforward to have the HIGH level correspond to the binary code 1 and the LOW level correspond to the binary code 0; however, it is equally valid to have the HIGH level correspond to the binary code 0 and the LOW level correspond to the binary code 1.
This operation is also called a logical sum because of its similarity to logical disjunction in which the output is true if at least one of the inputs is true. As a result, the logic operator is the plus sign (+). The logic symbol, truth table, logic function, and logic waveform for a 2-input OR gate are given in Fig. 9. Ideal OR gates can have any number of inputs. The operation of an n-bit, OR gates still follows the rule that the output will be true if any of the inputs are true. Fig. 7 The NOR Gate The NOR gate is identical to the OR gate with the exception that the output is inverted.
VLSI Circuit Layout: Theory and Design by Te Chiang Hu, Ernest S. Kuh